library verilog;
use verilog.vl_types.all;
entity fsm is
    generic(
        ERR_MODE        : integer := 0;
        IDLE            : integer := 0;
        POPPING         : integer := 1;
        POPPED          : integer := 2;
        ERROR           : integer := 3
    );
    port(
        pop_clk         : in     vl_logic;
        pop_rst_n       : in     vl_logic;
        pop_req_n       : in     vl_logic;
        fifo_empty      : in     vl_logic;
        pop_wd_n        : out    vl_logic;
        part_wd         : out    vl_logic;
        pop_error       : out    vl_logic
    );
    attribute mti_svvh_generic_type : integer;
    attribute mti_svvh_generic_type of ERR_MODE : constant is 1;
    attribute mti_svvh_generic_type of IDLE : constant is 1;
    attribute mti_svvh_generic_type of POPPING : constant is 1;
    attribute mti_svvh_generic_type of POPPED : constant is 1;
    attribute mti_svvh_generic_type of ERROR : constant is 1;
end fsm;
